UVM - two way communication

1. summary

• The same as one-way communication , Two-way communication （bidirectional communication） Both ends of are also divided into initiator and targer, But the data flow is bidirectional from end to end ;
• Both ends of two-way communication act at the same time producer and consumer Role , and initiator As request Initiator , Is initiating request after , Will wait response return ;
• UVM Bidirectional ports are divided into the following types ：
  • uvm_blocking_transport_PORT
  • uvm_nonblocking_transport_PORT
  • uvm_transport_PORT
  • uvm_blocking_master_PORT
  • uvm_nonblocking_master_PORT
  • uvm_master_PORT
  • uvm_blocking_slave_PORT
  • uvm_nonblocking_slave_PORT
  • uvm_slave_PORT

2. classification

• Two way ports are classified according to communication handshake ：
  • transport Two way communication
  • master and slave Two way communication
• transport Port by transp() Method , It can be done during the same method call REQ and RSP Sending and returning of ;
• master and slave The means of communication must be through put、get and peek Call to , Only two methods can be used to complete a handshake communication ;
• master Port and slave The difference between ports is , When initiator As master when , He will initiate REQ To target End , And then from target End access RSP; When initiator Use slave Port time , It will start with target End access REQ, And then RSP To target End ;
• about master Port or slave Port implementation , Similar to one-way communication , It's just imp There are more methods to implement the component where the port is located ;

3. transport

class comp1 extends uvm_component;
  uvm_blocking_transport_port #(itrans, otrans) bt_port;
  `uvm_component_utils(comp1)
  ...
  task run_phase(uvm_phase phase);
    itrans itr;
    otrans otr;
    int trans_num = 2;
    for(int i = 0; i < trans_num; i++) begin
      itr = new("itr", this);
      itr.id = i;
      itr.data = 'h10 + i;
      this.bt_port.transport(itr, otr);
      `uvm_info("TRSPT", $sformatf("put itrans id: 'h0x, data: 'h0x | get otrans id: 'h0x, data: 'h0x", itr.id, itr.data, otr.id, otr.data), UVM_LOW)
    end
  endtask
endclass

class comp2 extends uvm_component;
  uvm_blocking_transport_imp #(itrans, otrans, comp2) bt_imp;
  `uvm_component_utils(comp2)
  ...
  task transport(itrans req, output otrans rsp);
    rsp = new("rsp", this);
    rsp.id = req.id;
    rsp.data = req.data << 8;    
  endtask
endclass

class env1 extends uvm_env;
  comp1 c1;
  comp2 c2;
  `uvm_component_utils(env1)
  ...
  function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    c1 = comp1::type_id::create::("c1", this);
    c2 = comp2::tyoe_id::create::("c2", this);
  endfunction: build_phase
  function void connect_phase(uvm_phase phase);
    super.connect_phase(phase);
    c1.bt_port.connect(c2.bt_imp);
  endfunction: connect_phase
endclass

1. comp1 yes initiator,comp2 yes target, Predefined transmission type itrans and otrans
2. Instantiate the port
3. stay target One side defines corresponding import Methods needed ,transport()
4. Make connections in the top-level environment