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Introduction to gun make (1)

2022-06-26 01:55:00 Chen_ Hulk

1. GNU make Introduce

make By comparing the last modification time of the corresponding file , To determine which files need to be updated , Which files do not need to be updated .

 

When using make When the tool is compiled , The following documents are being executed in the project make Will be compiled when :

  • All source files have not been compiled , For each C Source files to compile Links , Generate executable files .
  • Each one was executed last time make Later modified C The source file is executed this time make Will be recompiled .
  • The header file was last executed make Later modified , All that contain this header file C The source file is executed this time make Will be recompiled .

 

2. makefile Introduction to the rules

TARGET...:PREREQUISITES

    COMMAND

    ....

 perhaps 

TARGET...:PREREQUISITES;COMMAND

    COMMAND

    ....



 The goal is : rely on 
[tab] command 

TARGET: The goal of the rules , Is the last file name to be generated or the intermediate process file name for this purpose .

                It can also be a make The name of the action performed , Like the goal clean.

PREREQUISITES: Rule dependency , Generate a list of file names required for rule targets .( Dependence is not necessary , such as clean)

COMMAND:

  • When a rule's command line appears alone , Each command line must be [tab] Character start .
  • When a command and a target dependency appear in the same row , Need to use “;” Separate .

 

3. make If work

By default ,make Execution is makefile The first rule in , The first goal of this rule is The ultimate goal / The ultimate goal .

If makefile The first rule of has multiple targets , Then the default ultimate goal is the first of multiple goals .

 

give an example :

edit:main.o kbd.o
    cc -o edit main.o kdb.o

main.o:main.c defs.h
    cc -c main.c
kdb.o:kdb.c command.h
    cc -c kdb.c
  • make First, analyze the rules of the ultimate goal , According to its dependent files , Look for the rules that create these dependent files from left to right .
  • After rebuilding all dependent files , The last step is to rebuild the goal of this rule .
  • If an error occurs in any rule execution , be make Immediately report an error and exit .(make It doesn't matter whether the dependency on the rule is correct , Whether the command line of the rule describing the reconstruction target does error checking correctly .)

 

All the dependent files of the ultimate goal main.o kbd.o update rule :

  • The goal is .o file does not exist , Create it using its description rules .
  • The goal is .o File exists , The goal is .o File depends on .c Source file ,  .h Any one of the files is larger than the target file .o to update , Regenerate it more regularly .
  • The goal is .o File exists , The goal is .o The file is newer than any of its dependent files (.c / .h), And do nothing .
  •  defs.h Appear in dependencies , But it doesn't appear in the command , Because of the assumption  main.c Already in the include 了 defs.h file .

 

The ultimate goal edit update rule :

  • The ultimate goal file does not exist , Then execute the rule to create the target .
  • The ultimate goal file exists , One or more of its dependent files are newer than it , Then re link to generate the ultimate goal according to the rules .
  • The ultimate goal file exists , It is more up-to-date than any of its dependent files , And do nothing .

 

4. Specify variables

edit:main.o kbd.o
    cc -o edit main.o kdb.o

In the above rules ,main.o kbd.o There are two occurrences in dependency and rule respectively , When you need to add or delete , You need to add... In two places , Later maintenance remains unchanged .

To avoid this problem , Use a variable objects/OBJECTS/objs/OBJS/obj/OBJ For all .o File list : objects = main.o kbd.o

objects = main.o kbd.o
edit:$(objects)
    cc -o edit:$(objects)

 

5. Automatically deduce rules

In the use of make compile .c Source file , compile .c The command of the source file rule may not be explicitly given , because make There is a default rule in itself , Can automatically complete the process of .c Compile the file and generate the corresponding .o file , Carry out orders “cc -c” To compile the .c Source file .

stay makefile In, we only need to give the name of the target file to be rebuilt (.o file ),make Automatically for this .o File search for appropriate dependent files ( The suffix is .c, Files with the same file name .)

such , We can omit the description .c Document and .o Rules for dependencies .

give an example :

main.o : main.c defs.h
    cc -c main.c


make Automatically for main.o File addressing appropriate dependent files main.c, And use , The default rules cc -c main.c -o main.o
 The above can be simplified to :
main.o:defs.h

 

 

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