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FPGA - 7 Series FPGA selectio -02- introduction to source language

2022-06-21 06:16:00 【Vuko-wxh】

Write it at the front

We must sharpen our weapons before we attack them , The main translation sections of this article are selected from UG471, Mainly for 7 Series of xilinx FPGA IO Resources buffer A brief description of the source language , understand buffer Basic structure .

7 series FPGA SelectIO The original language

Xilinx The software library contains a large number of primitives , To support the 7 series FPGA I/O Various available in primitives I/O standard . The following generic primitives can support most of the available single ended I/O standard .

IBUF（ Input buffer ）
IBUF_IBUFDISABLE（ Input buffer with buffer disable control ）
IBUF_INTERMDISABLE（ With buffer disable and IN_TERM Disable the input buffer of the control ）
IBUFG（ Clock input buffer ）
IOBUF（ Bidirectional buffer ）
IOBUF_DCIEN（ have DCI Disabled bidirectional buffer And input buffer disable ）
IOBUF_INTERMDISABLE（ Bidirectional buffer , with IN_TERM Disable and input buffer disable ）
OBUF（ Output buffer ）
OBUFT（ Three state output buffer ）

These eight generic primitives can support most of the available differential I/O standard ：

IBUFDS（ Differential input buffer ）
IBUFDS_DIFF_OUT（ Differential input buffer with complementary outputs ）
IBUFDS_DIFF_OUT_IBUFDISABLE（ Differential input buffer with complementary output and buffer disable ）
IBUFDS_DIFF_OUT_INTERMDISABLE（ With complementary outputs 、 Buffer disable and IN_TERM Disabled differential input buffer ）
IBUFDS_IBUFDISABLE ( Differential input buffer with buffer disable control ）
IBUFDS_INTERMDISABLE（ Different With buffer disable and IN_TERM Forbidden ial Input buffer ）
IBUFGDS（ Differential clock input buffer ）
IBUFGDS_DIFF_OUT（ Differential clock input buffer with complementary outputs ）
IOBUFDS（ Differential bidirectional buffer ）
IOBUFDS_DCIEN（ have DCI Disable differential bidirectional buffer with input buffer disabled )
IOBUFDS_DIFF_OUT（ A differential bidirectional buffer having complementary outputs from an input buffer ）
IOBUFDS_DIFF_OUT_DCIEN（ A differential bidirectional buffer having complementary outputs from an input buffer , have DCI Disable and input buffer disable ）
IOBUFDS_DIFF_OUT_INTERMDISABLE（ A differential bidirectional buffer having complementary outputs from an input buffer belt IN_TERM Disable and buffer disable ）
IOBUFDS_INTERMDISABLE（ With buffer disable and IN_TERM Disabled differential bidirectional buffer ）
OBUFDS（ Differential output buffer ）
OBUFTDS（ Differential tristate output buffer ）

IBUF and IBUFG

Used as a 7 The input buffer must be used for the input signal of the series equipment (IBUF). Universal 7 series FPGA IBUF The primitive is shown in the following figure .

IBUF and IBUFG The primitives are the same . Used when the input buffer is used as a clock input IBUFG. In Xilinx software tools , One IBUFG Automatically placed at the clock input position .

IBUF_IBUFDISABLE

As shown in the figure below IBUF_IBUFDISABLE The primitive is an input buffer with a disabled port , It can be used as an additional energy saving function when the input is not used .

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IBUF_IBUFDISABLE Primitives can disable the input buffer and force it to the structure O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . This function can be used in I/O Reduce power consumption when idle . Use VREF Power rail （ Such as SSTL and HSTL） Of the input buffer from IBUFDISABLE Set to TRUE Gain the most , Because they tend to have a ratio to non VREF standard （ Such as LVCMOS and LVTTL） Higher static power consumption .

IBUF_INTERMDISABLE

As shown in the following figure IBUF_INTERMDISABLE The primitive is in HR I/O bank Available in the , It is associated with IBUF_IBUFDISABLE Primitives are similar , Because it has a IBUFDISABLE port , Can be used to disable input buffers while they are not in use . IBUF_INTERMDISABLE The primitive has another INTERMDISABLE port , Can be used to disable the optional uncalibrated split terminal function .

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IBUF_INTERMDISABLE Primitives can disable the input buffer and force it to the structure O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Use the optional uncalibrated split terminal function (IN_TERM), As long as the drive is active （T Low level ）, These terminal pins will be disabled . IBUF_INTERMDISABLE Primitives are also allowed in INTERMDISABLE When the signal is set to high level, the terminal branch is disabled .

Whenever input is idle , These features can be combined to reduce power consumption . Use VREF Power rail （ Such as SSTL and HSTL） Of the input buffer from IBUFDISABLE The signal is set to TRUE Gain the most , Because they tend to have a ratio to non VREF standard （ Such as LVCMOS and LVTTL） Higher static power consumption .

IBUFDS and IBUFGDS

The usage and rules corresponding to the difference primitive are the same as those of the single terminal SelectIO The primitive is similar to . Difference SelectIO The primitive has two pins connected to the device pad , To show... In a differential pair P and N Channel pin . N The channel pins have B suffix . IBUFDS and IBUFGDS Same primitive , Used when the differential input buffer is used as a clock input IBUFGDS. The following figure shows the differential input buffer primitive .

IBUFDS_DIFF_OUT and IBUFGDS_DIFF_OUT

The figure below shows that there are complementary outputs （O and OB） Differential input buffer primitive for . IBUFDS_DIFF_OUT and IBUFGDS_DIFF_OUT Same primitive ,IBUFGDS_DIFF_OUT For clock input . These primitives are only recommended for experienced Xilinx designers .

IBUFDS_DIFF_OUT_IBUFDISABLE

As shown in the following figure IBUFDS_DIFF_OUT_IBUFDISABLE The primitive is a differential input buffer , It has complementary differential output and a disabled port , It can be used as an additional energy saving function when the input is not used .

When USE_IBUFDISABLE Property is set to TRUE And IBUFDISABLE The signal is set to high level ,IBUFDS_DIFF_OUT_IBUFDISABLE Primitives can disable the input buffer and force O and OB Output to structure high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . This function can be used in I/O Reduce power consumption when idle .

IBUFDS_IBUFDISABLE

As shown in the figure below IBUFDS_IBUFDISABLE The primitive is a differential input buffer , With a disabled port , It can be used as an additional energy saving function when the input is not used .

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IBUFDS_IBUFDISABLE Primitives can disable the input buffer and force it into the schema O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . This function can be used in I/O Reduce power consumption when idle .

IBUFDS_INTERMDISABLE

As shown in the following figure IBUFDS_INTERMDISABLE The primitive is in HR I/O bank Available in the , It is associated with IBUFDS_IBUFDISABLE The primitive is similar to , Because it has a IBUFDISABLE port , Can be used to disable the input buffer while the buffer is not running Used . IBUFDS_INTERMDISABLE The primitive has another INTERMDISABLE port , Can be used to disable the optional uncalibrated split terminal function .

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IBUFDS_INTERMDISABLE Primitives can disable the input buffer and force O Output to structure high level . If USE_IBUFDISABLE Set to FALSE, be IBUFDISABLE Input will be ignored and should be grounded . If I/O Use the optional uncalibrated split terminal function (IN_TERM), Then as long as INTERMDISABLE The signal is set to high level , This primitive disables the terminal branch . Whenever input is idle , These functions can be combined to reduce power consumption .

IBUFDS_DIFF_OUT_INTERMDISABLE

The following figure shows IBUFDS_DIFF_OUT_INTERMDISABLE The primitive is in HR I/O bank Available in the , It is associated with IBUFDS_IBUFDISABLE Primitives are similar , Because it has a IBUFDISABLE port , Can be used to disable input buffers while they are not in use . IBUFDS_DIFF_OUT_INTERMDISABLE The primitive has another INTERMDISABLE port , Can be used to disable the optional uncalibrated split terminal function .

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IBUFDS_DIFF_OUT_INTERMDISABLE Primitives can disable the input buffer and force O and OB Output to structure high level . If USE_IBUFDISABLE Set to FALSE, be IBUFDISABLE Input will be ignored and should be grounded . If I/O Use the optional uncalibrated split terminal function (IN_TERM), Then as long as INTERMDISABLE The signal is set to high level , This primitive disables the terminal branch . Whenever input is idle , These functions can be combined to reduce power consumption .

IOBUF

When bi-directional signals require input buffers and have high level active tristate T Pin three state output buffer , need IOBUF The original language . The following figure shows a generic 7 series FPGA IOBUF. T The logic high on the pin disables the output buffer .

IOBUF_DCIEN

As shown in the figure below IOBUF_DCIEN The primitive is in HP I/O bank Available in the . It has one IBUFDISABLE port , Can be used to disable input buffers while they are not in use . IOBUF_DCIEN The primitive has another DCITERMDISABLE port , Can be used to manually disable the optional DCI Split termination function .

When USE_IBUFDISABLE Property is set to TRUE And IBUFDISABLE The signal is set to high level ,IOBUF_DCIEN Primitives can disable the input buffer and force it into the schema O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Use separate termination DCI function , Then as long as DCITERMDISABLE The signal is set to high level , This primitive disables the termination Branch . There are only three states DCI I/O The standard can be used for bidirectional signals .

Use three states DCI I/O standard , As long as the drive is active ,DCI The terminal branch will close . IOBUF_DCIEN Primitives are also allowed in DCITERMDISABLE When the signal is set to high level, the terminal branch is disabled . Just enter the idle time , These functions can be combined to reduce power consumption .

IOBUFDS

The following figure shows the differential input / Output buffer primitive . T The logic high on the pin disables the output buffer .

IOBUFDS_DCIEN

As shown in the figure below IOBUFDS_DCIEN The primitive is in HP I/O bank Available in the . It has one IBUFDISABLE port , Can be used to disable input buffers while they are not in use . IOBUFDS_DCIEN The primitive has another DCITERMDISABLE port , Can be used to manually disable the optional DCI Split termination function . For more information , See splitting the terminal DCI（ Thevenin equivalent terminal to VCCO/2） and DCI And tristate DCI (T_DCI).

When USE_IBUFDISABLE Property is set to TRUE also IBUFDISABLE The signal is set to high level ,IOBUFDS_DCIEN Primitives can disable the input buffer and force it into the schema O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Use separate termination DCI function , Then as long as DCITERMDISABLE The signal is set to high level , This primitive disables the termination Branch . There are only three states DCI I/O The standard can be used for bidirectional signals .

Use three states DCI I/O standard , As long as the drive is active ,DCI The terminal branch will close . IOBUFDS_DCIEN Primitives are also allowed in DCITERMDISABLE When the signal is set to high level, the terminal branch is disabled . Just enter the idle time , These functions can be combined to reduce power consumption .

IOBUFDS_DIFF_OUT

The figure below shows that there are complementary outputs （O and OB） Differential input / Output buffer primitive . This primitive is only recommended for experienced Xilinx Designers use memory interface applications . T The logic high on the pin disables the output buffer .

IOBUFDS_DIFF_OUT_DCIEN

As shown in the figure below IOBUFDS_DIFF_OUT_DCIEN The primitive is in HP I/O bank Available in the . It has a complementary differential output 、 One IBUFDISABLE port , Can be used to disable input buffers while they are not in use , And one. DCITERMDISABLE port , Can be used to manually disable the optional DCI Separate terminal functions .

When USE_IBUFDISABLE Property is set to TRUE And IBUFDISABLE The signal is set to high level ,IOBUFDS_DIFF_OUT_DCIEN Primitives can disable the input buffer and force O and OB Output to structure high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Using separate termination DCI function , as long as DCITERMDISABLE The signal is set to high level , This primitive disables the termination Branch . There are only three states DCI I/O The standard can be used for bidirectional signals . For three states DCI I/O standard , As long as the drive is active ,DCI The terminal branch will close （ about IO Output ,TS Low level , about IOB Output ,TM Low level ）. IOBUFDS_DIFF_OUT_DCIEN Primitives are also allowed in DCITERMDISABLE When the signal is set to high level, the terminal branch is disabled . Just enter the idle time , These features can be combined to reduce power consumption .

IOBUFDS_DIFF_OUT_INTERMDISABLE

As shown in the figure below IOBUFDS_DIFF_OUT_INTERMDISABLE The primitive is in HR I/O bank Available in the . It has one IBUFDISABLE port , Can be used to disable input buffers while they are not in use .IOBUFDS_DIFF_OUT_INTERMDISABLE The primitive has another INTERMDISABLE port , Can be used to disable the optional uncalibrated split termination function .

When USE_IBUFDISABLE Property is set to TRUE And IBUFDISABLE The signal is set to high level ,IOBUFDS_DIFF_OUT_INTERMDISABLE Primitives can disable the input buffer and force O and OB Output to structure high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Use the optional uncalibrated breakaway termination function (IN_TERM), As long as the drive is active , These termination pins are also disabled （IO Output TS Low level ,IOB Output TM Low level ）. IOBUFDS_DIFF_OUT_INTERMDISABLE Primitives are also allowed in INTERMDISABLE When the signal is set to high level, the terminal branch is disabled . Just enter the idle time , These functions can be combined to reduce power consumption .

IOBUFDS_INTERMDISABLE

As shown in the figure below IOBUFDS_INTERMDISABLE The primitive is in HR I/O bank Available in the . It has one IBUFDISABLE port , Can be used to disable input buffers while they are not in use . IOBUFDS_INTERMDISABLE The primitive has another INTERMDISABLE port , Can be used to disable the optional uncalibrated split terminal function .

When USE_IBUFDISABLE Property is set to TRUE And IBUFDISABLE The signal is set to high level ,IOBUFDS_INTERMDISABLE Primitives can disable the input buffer and force it into the schema O The output is logic high level . If USE_IBUFDISABLE Set to FALSE, This input will be ignored and should be grounded . If I/O Use the optional uncalibrated split terminal function (IN_TERM), As long as the drive is active （T Low level ）, These terminal pins will be disabled . This primitive also allows you to INTERMDISABLE When the signal is set to high level, the terminal branch is disabled . Just enter the idle time , These functions can be combined to reduce power consumption .

OBUF

An output buffer must be used (OBUF) Send the signal from 7 Series devices are driven to external output pads . Universal 7 series FPGA OBUF The primitive is shown in the following figure .