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Define macros in makefile and pass them to source code
2022-07-25 02:56:00 【Spend my whole life reading】
makefile yes liunx Under the platform c、c++ Develop indispensable tools , Master some makefile The skills of are very helpful for project compilation and construction , This article mainly records makefile Macro definition and pass it to the source code , It mainly conveys a code_version Variable , Variables are passed through git Command acquisition commit id, Pass the macro definition to the source code , In the source code, you can get commit id, It can be used as code Version information for , This is for frequent release The project is very important , Can confirm some so Does the version of match .
1 Project directory structure
The establishment of a demo The structure of the project catalogue is as follows :
├── include
│ └── common.h
├── main_dir
│ ├── main.c
│ └── makefile
├── makefile
├── obj
│ ├── function.o
│ └── main.o
├── readme.txt
└── sub_dir
├── function.c
└── makefile
2 Top level directory makefile Reading
Top level directory makefile:
CC = gcc
CFLAGS = -g -Wall -O
export TARGET = demo
export OBJ = function.o main.o
export BUILD_PATH = $(PWD)
export SUBDIR = main_dir sub_dir
export OBJDIR = $(BUILD_PATH)
export code_version = $(shell (git rev-parse --short HEAD))
export code_branch = $(shell (git branch))
export code_date= $(shell (git log -1 --format=%cd ))
$(info $(code_version))
$(info $(code_branch))
$(info $(code_date))
all:sub_target $(TARGET)
$(TARGET):$(OBJ)
$(CC) $^ -o $(OBJDIR)/[email protected]
@echo "-------build target success-------"
sub_target:
@echo "-------start build sub dir-------"
make -C main_dir
make -C sub_dir
@echo "-------build sub dir end-------"
clean:
rm -rf $(OBJDIR)/*.o $(TARGET)
top floor makefile The goal is to compile demo Executable program , compile demo Need to rely on main_dir and sub_dir Compile the function.o and main.o, And compile function.o and main.o Store it in obj Folder , This is convenient for project management . The top-level directory also passes shell The command defines code_version Variable , In this way, others in the project makefile You can use this variable , This is also makefile A way to pass variables between .
2 main_dir Directory source code interpretation
main_dir There is a main.c And a makefile file ,main.c Enter the following contents :
#include <stdio.h>
#include "../include/common.h"
int main()
{
printf("code version: %s\n", CODE_VERSION);
printf("main IN\n");
int sum = add(5, 6);
printf("sum = %d \n",sum);
printf("main OUT\n");
return 0;
}
It mainly calls a add function ,add The declaration of the function is in include/common.h, Realize in sub_dir/function.c,common.h The content in is very simple , Only do the add Function declaration :
int add (int a, int b);
main Function also prints CODE_VERSION This macro , The macro in common.h and main.c There is no definition in , It passes when compiling makefile Defined ,main_dir in makefile Content into the next :
CFLAGS += -DCODE_VERSION=\"$(code_version)\"
$(OBJDIR)/main.o:main.c
$(CC) $(CFLAGS) -c $^ -o [email protected]
among :
CFLAGS += -DCODE_VERSION=\"$(code_version)\"
That's the definition CODE_VERSION This macro , And the content of the macro is the top level makefile Variables passed in , Besides ,makefile You need to use escape characters when defining string macros in .
3 sub_dir Directory source code interpretation
sub_dir The directory contains a function.c Documents and a makefile,function.c The middle is add Function implementation :
#include <stdio.h>
#include "../include/common.h"
int add (int a, int b)
{
return a+b;
}
sub_dir in makefile Content :
$(OBJDIR)/function.o:function.c
$(CC) $(CFLAGS) -c $^ -o [email protected]
4 Effect validation
Execute in the top-level directory make Command to compile :
make
The compilation results are as follows :
Run the program :
./demo
give the result as follows :
You can see CODE_VERSION Some are printed correctly .
Experimental code git Address :https://github.com/zhenghaiyang123/makefile_demo.git
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