USB3.0: layout guide for vl817q7-c0

This article focuses on the common USB3.0 Hub driver chip via VL817-Q7C0 Of layout Layout treatment and precautions . It can be divided into three sections . This article focuses on the first section ：PCB Key description of layout .

One ：LATOUT Key notes of layout ：

1： First of all PCB Impedance of board circuit , Here is an example of two-layer plate impedance precautions ,

<1> Double deck ：

USB：90Ω+/- 10 %    W-S-W → 11-5-11 mils

SATA: 100Ω+/- 10 %   W-S-W →6-5-6 mils

Plate thickness ：1.6mm

USB : 90Ω+/- 10 %     W-S-W = 12-5-12 mils

SATA: 100Ω+/- 10 %    W-S-W =7-5-7 mils

<2>, The second is the spacing specification of the line

  The distance between all impedance lines should be as large as possible , The ideal value is greater than 5 Times the line width (5W)

 

  Impedance line and GND shape,VIA And the spacing of other parts should be greater than the width （3w）, If you can 4 It is better to be above the line width .

The second is Diff pair When routing, you need to GND Copper foil space is also made

 <3>.Vias on GND Routing shape

Close to the impedance line GND shape There should be a series of GND vias, also GND vias The distance between each other should be at least less than 200mils, And the smaller the spacing, the better .

  notes ： It should be avoided that precedents have bulges , Slender and without GND via Of GND shape.

2:90ohm Impedance line Via

Diff. Pair：W-S-W = 6-6-6 mils

Via spec.：drill = 12 mil,pad = 20 mil,antipad = 28 mil

 Trace angle：45 degree

  Generally, change the floor

S-pitch = 54 mil,G-pitch = 34 mil

  Wrong line

S-pitch = 55 mil, G-pitch = 30 mil

Minimum via to trace spacing V2T = 6 mil

3：Diff pari Routing settings

<1>Chip E-Pad

GND vias The more the better , And evenly distributed ( But be careful power plane The integrity of )

De-caps Of GND via Best in E-PAD On

  notes ：GND Please don't lay copper + Word shop copper

4.：Power Plane

De-caps The closer you visit chip The better

All power supplies are better to use Acura power plane The design of the , And connected with other layers via The more, the better .

Power supply vias More than the backend ,Power The source of the .

 5.：USB3.0 The connector

<1>USB 3.0 Std A, Stack A, and Std B Connectors

DIP Via for TX/RX pins:

Drill = 28 mil, Pad = 43 mil, Antipad (L2 and L3) = 80 mil

 <2>Miceo usb

TX/RX pads:

Pad Width = 20 mil

Etched GND width on L2 = 23 mil

L3 should If GND shape

<3>SMD Solder joint

Pad Width = 50 mil

PAD picth=66.93mil

Etched GND width on L2 = 146.93 mil

L3 should still be GND

  That's all VL817 Of layout Layout description of , Due to limited space , Some details in the text are not explained carefully .

Section II PCBLAYOUT The inspection of And section III VLI Chip layout Layout description of It will be sorted out and released as soon as possible . For details of the first section, please contact the blogger , Talk about communication together .