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Tianshu night reading notes -- memory paging mechanism

2022-06-25 01:17:00 ma_ de_ hao_ mei_ le

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In modern operating systems , Will use the paging mechanism

stay 32bit Operating system , For a process , He has 4GB Of memory space

Which is low 2G Belonging to the process itself , high 2G Is the kernel space , All processes see the same value in kernel space , In other words, it's shared , But the process does not have permission to access this memory directly , Different processes also cannot directly access the low level of other processes 2GB Memory space ( User space )

All processes see the same memory address , These addresses are actually virtual addresses , They have a translation relationship with the physical address

The transformation relationship is as follows :
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Catalog : Paging Directory , You can think of it as a table of contents , Each item points to a page table ( We agreed that this table is called CNMDTABLE), It's an address , Add... To this address cr3 Register value , Get the address of the page table
page : Used to indicate that we want CNMDTABLE Which item in the , Or an address ( We use positioning WCNMADDR)
The offset : Use this offset +WCNMADDR You can get the physical address

When calculating the page , We can determine whether this page exists , Because the status of the page is recorded in the page table , If this page does not exist , It triggers a page failure interrupt , Change pages from disk to memory

12 The offset of bit indicates , Each page can reach a maximum of 4MB, But actually a page is 4kb

When switching between different processes ,cr3 The value of is different , In this way, different physical addresses can be calculated from the same virtual memory address

Page memory protection mechanism

The detailed structure of each item in the page table

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P Used to indicate whether this page exists
W Used to indicate whether it is writable
U:1 Represented as a user page R3 level ,0 Represented as a system page R0 level

But there is no flag bit indicating whether the page can be executed

Later, CPU Architecture solves this problem

Page table entries are expanded to 64bit, among NX If enabled, the page is not executable

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