UART protocol timing summary

UART Work in asynchronous mode , No clock signal is needed , Its general format is ： Start bit + Data bits + Check bit + Stop bit . Where the start bit 1 position , Data bits 5~8 position , Check bit 0 or 1 position , Stop bit 1、1.5 or 2 position . But the most The usual format is 1 Bit start bit 、8 Digit bit 、 No parity 、1 Bit stop bit , Short for 8/N/1.

8/N/1 The sequence diagram of the format is as follows ：

When idle, the data line is specified as logical 1.

At baud rate 9600 For example , Start with 1/9600s When transmitting data bit by bit, the start bit is sent first , Specified as logical 0, The receiver will detect this falling edge , So as to start sampling and receiving data later . Set the sampling interval as N, When sampling 8N after , You can stop sampling .

The start bit is followed by the data bit , Send the lowest bit first , namely LSB First. because UART No clock signal , Therefore, the baud rate is used to determine the length of each bit , But to ensure the accuracy of the test , The actual sampling frequency will be higher than the baud rate , Generally, each bit will be sampled several times , Take the middle sampling value as the result of this bit .

Parity bits are generally not used .

The stop bit is generally used 1 position , Specified as logical 1, In addition to indicating the end of transmission , The stop bit can also play the role of clock synchronization .

It should be noted that , The logic here 0 It doesn't have to be 0V, This is related to the level standard used . about TTL In terms of level , Logic 0 yes 0V, Logic 1 Is a high level （ It's usually 3.3V or 5V）; about RS-232 In terms of level , Logic 0 yes 3V15V, Logic 1 yes -3-15V.

except TX、RX、GND Out of signal ,UART There will also be such RTS、CTS Wait for flow control signal , Because it's not used much , There is no summary here .