Two threads execute i++ 100 times respectively, and the possible values obtained

Two threads execute each 100 Time i++, Possible values obtained

Maximum 200, minimum value 2

The process of obtaining a minimum ：

1. Threads 1： stay CPU0 perform , From memory 0 To register RegX. At this time, the memory is memory = 0.
2. Threads 2： stay CPU1 perform , From memory 0 To register RegY, perform 99 Secondary self addition operation , This may be written back to memory . The first 99 Time calculation completed , Write back to memory , At this time, the memory is memory = 99.
3. Threads 1： Start the first 1 Secondary self addition , And write back to memory . At this time, the memory is memory = 1.
4. Threads 2： From memory （ This is the case memory = 1） To register RegY, Completion of 100 Secondary self addition , The result is RegY = 2, Before writing back to memory , Threads 1 The following section has been completed 5 Step .
5. Threads 1： From memory （ This is the case memory = 1） To register RegX, Finish the rest 99 Secondary self addition , here RegX = 100, And then write it back to memory , here memory = 100.
6. Threads 2： take RegY = 2 Write back to memory , Final memory = 2.

i=100, Two threads execute each 50 Time i--, Possible values obtained

Maximum 98, minimum value 0

The process of obtaining the maximum value ：

Reference resources

1. https://blog.csdn.net/zhangrui_fslib_org/article/details/50311195
2. https://wenku.baidu.com/view/233e49f483eb6294dd88d0d233d4b14e85243e02.html
3. CPU Cache consistency
4. Cache consistency protocol
5. Explanation of cache consistency
6. Cache consistency protocol ： Strongly recommend
7. CPU How to cache consistency MESI Protocols to address visibility